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FPGA Mezzanine Card (FMC) per VITA-57
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Single ADC EV10AS150B @2.5 GSPS
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Single module
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5 GHz Full Power Input Bandwidth (-3dB)
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True single core architecture (no calibration required)
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External Interleaving:Full scale analog input Voltage Span 500mVpp
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Gain Adjust
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Offset Adjust
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Sampling Delay Adjust
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All front panel input/outputs are via MMCX:
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Analog Input
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Reference clock
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Trig in/out
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General purpose I/O
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Super low phase noise RF PLL Synthesizer
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